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#apertus IRC Channel Logs

2015/11/02

Timezone: UTC


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fsteinel
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intracube
changed nick to: intracube|away
05:47
Bertl_zZ
changed nick to: Bertl
05:47
Bertl
morning folks!
06:50
se6astian|away
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06:55
se6astian
good morning
06:57
Bertl
morning se6astian!
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sebix
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Bertl
off for now ... bbl
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Bertl
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se6astian
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18:14
John_K
Beta PCBs arrived from OSHPark!
18:19
Bertl_oO
congrats!
18:20
Bertl_oO
maybe document the entire build process
18:20
Bertl_oO
changed nick to: Bertl
18:20
Bertl
so that we can later make an article from/about it?
18:22
Bertl
(for others to get inspired)
18:23
John_K
Yeah, I'm trying to put together a BOM atm
18:23
John_K
Difficult even with the Google sheets
18:24
Bertl
let me know if you need anything (i.e. if something is unclear)
18:24
John_K
Some parts are out of stock, etc... At least I ordered the ZIFs in advance
18:25
John_K
Will do, hoping to have them assembled later this week or early next week
18:25
Bertl
usually you can use similar parts (for passive components)
18:25
Bertl
and the active ones should be available from various distributors
18:26
John_K
True, I saw a few werenobly available from Farnell but not element14 America
18:26
John_K
Were only*
18:27
danieel
we have the opposite issue :) some are from america only and not at Farnell :))
18:28
Bertl
John_K: also note that not all parts need to be populated to get a working beta
18:29
Bertl
specifically on the power board and the sensor frontend
18:29
John_K
Other than the DNP passive?
18:30
Bertl
yes, for example you can drop the entire voltage check blocks from the sensor frontend (for now)
18:30
Bertl
as you are adjusting the power board manually to the desired voltages
18:30
Bertl
and there you only need to populate the circuits for the actual voltage rails in use
18:31
Bertl
it might bite you lateron when the boards get updated, but then it should be easy to add the missing parts and/or do a new board
18:32
Bertl
http://files.apertus.org/AXIOM-Beta/Beta%20Sensor%20Front%20End1.jpg
18:32
Bertl
here for example you can see the "minimal" configuration
18:33
Bertl
well, you could leave out the eeprom at the top left as well
18:36
Bertl
on the power board you can drop the FTDI circuit if you don't want the JTAG interface via USB (and use the one on the microzed)
18:36
Bertl
you can also leave out the micro SD circuit (if you don't need it)
18:37
Bertl
and here you can see the minimal config from the regulator side:
18:37
Bertl
https://wiki.apertus.org/images/f/f4/BetaPowerBoard_0.18_TOP.jpg
18:37
Bertl
i.e. WW/SW/SE/EE as well as MCN/MCS are not required for basic operation
18:40
danieel
Bertl: once i wanted to do a html/svg visualization of boards.. this required/optional/dnp could be shown nicely with such a gui..
18:41
Bertl
kind of on/off layer composition or so?
18:41
danieel
yes, and as components are tagged they can be filtered by that
18:42
danieel
handful for hand assembly (highlight all of same value)
18:42
danieel
does such tool exist?
18:45
Bertl
not that I know of
18:50
danieel
for my next birthday (april 1) we can rewrite the debayering article: http://stargazerslounge.com/topic/166334-debayering-a-dslrs-bayer-matrix/ :))
18:56
John_K
http://imgur.com/gallery/gGWlr
18:57
John_K
Purple PCB prob
18:57
John_K
Porn
18:57
John_K
Oops
18:57
Bertl
almost
18:58
John_K
Http://imgur.com/gGWlr
18:58
John_K
I'll do this from not mobile
19:03
John_K
Third times a charm http://m.imgur.com/gGWIr
19:03
intracube|away
changed nick to: intracube
19:05
John_K
Bertl: thanks for the pointer to minimal configs, may go with that for now
19:10
Bertl
@images: nice :)
19:11
Bertl
on the main board, you can leave out the shield connectors for now (they can easily be added lateron) and the piezo
19:17
irieger
danieel: That debayering looks nice!
19:17
irieger
Would like to have a spare cam and have it "debayered" :D
19:18
irieger
Makes demosaicing so much easier thought :D
19:19
danieel
definitely hardware based implementation of the algorithm :)
19:26
irieger
Yeah. Btw.
19:27
irieger
Bertl: I head a great idea. Would be nice to be able to just output raw 12 bit data via HDMI and would be recordable with existing hardware. My idea was: Pack raw data into 1920x1080x3colorsx12bit
19:28
danieel
you have 4 in bayer
19:28
Bertl
and 12bit requires deep color
19:28
irieger
should be possible to even get a 3672x3072 or so for 4K anamorphic recording with around 33 fps into a 1080p60 stream
19:29
irieger
Bertl: is that a problem with the HDMI controlers?
19:29
irieger
danieel: you mean 4 what?
19:30
irieger
just did a small calculation how this would fit into 1920x1080 while on the road cause I liked the idea and there is already hardware able to capture 1080p50 / 1080p60 at 12 bit 444
19:30
Bertl
it doubles the bandwidth or halves the frame rate
19:31
irieger
had a chance to shoot some test material with the lovely Zeiss Master Anamorphics on Friday and I just fell in love with anamorphic lenses btw ;-)
19:31
Bertl
(deep color that is)
19:31
irieger
So 60p is only possible with 8bit and 10/12 will require to go back to 30p?
19:32
Bertl
with the current direct from FPGA HDMI out, yes
19:32
Bertl
also note that most recorders cannot capture 12bit 444
19:33
irieger
I know. But there are some that can (Convergent Design). And some capture cards/thunderbolt capture modules can do so
19:33
Bertl
in raw or with some lossy codec?
19:33
irieger
Why must everything be so difficult ... Sounded so nice
19:34
irieger
Bertl: in 12bit 444 DPX so uncompressed "raw"
19:34
irieger
implementing this idea would mean the image would look like crap of course but with a small software it could easily be converted to cinemaDNG or so
19:36
Bertl
well, there are still some options left, I have some ideas which we will test in the near future
19:38
irieger
Top secret currently or can you give a hint? ;-)
19:39
irieger
btw. I recently played with color matrix creation with our toolset which I currently test and look for optimization possiblities. Here is a test image: http://content.irieger.net/bm_colorchecker_srgb_tun.jpg
19:40
irieger
looks quite good and was just the first step. Ignore some glitches in this image. I intentionally used a simple daybering algorithm and ignored some stuff like usable pixel area maybe ...
19:40
irieger
And on the linux laptop I'm currently on it looks quite worse than on my Macbook I have to say
19:41
danieel
irieger: when you get the table right, any real object will be strange colored :)
19:41
irieger
;-)
19:42
Bertl
top secret of course ... :)
19:43
irieger
Well, I will play with different optimizations. Our tools allow to throw in some parameter files to for example focus the optimization on skin tones etc.
19:44
Bertl
what we plan to do is to distribute the raw data in a way that it won't get mutilated too much by recording with cheap recorders
19:44
Bertl
(i.e. with compression in place)
19:44
irieger
Now I'm listening?!
19:46
Bertl
for example, assuming that there is 422 recording at 60FPS, we can break down the raw image (at 30FPS) into two images RG and GB with a proper distribution
19:47
Bertl
but we need to do some tests to figure out the optimal layout there
19:48
irieger
Bertl: well, most really cheap recorders can't do 60fps either ;-)
19:49
Bertl
indeed, but it is probably a good middle ground
19:50
irieger
Definitely.
19:50
Bertl
i.e. 60p pro-res (or similar) is more common than 30p 12bit 444 raw
19:50
irieger
Yes. Just fear what prores will do to the raw image. And it will lose 2 bits
19:51
Bertl
but note that 30p 12bit 444 at 1080p should be no problem with the current HDMI interfaces
19:52
Bertl
so if you have two recorders which can do that, then you might already have a raw recording solution with (almost) full size
19:52
John_K
How much over gig-e transmit rates are we with 1080p 60fps 12-bit?
19:52
irieger
Of course, that should work.
19:52
John_K
Seems like there should be plenty of space in the FPGA for some lossless compression
19:53
irieger
John_K: Full sensor is around 432 MByte/s I'd say
19:54
irieger
4096*3072*12/8 bytes per image
19:55
John_K
Right but for 1080 should be possible with minimal compression
19:55
John_K
1080p60 raw should be ~185MiB/s
19:55
John_K
So should be attainable with compression
19:57
John_K
Looks like 10GBE could be a possible expansion too as long as the PCB routing is compatible
19:58
irieger
John_K: The problem is: You have to do the bad stuff DSLRs do to get 1080p RAW or just take the inner 1080p frame of the sensor which is also kind of bad.
19:59
John_K
What would the problem be as long as you capture 16x pixels all around no?
20:00
John_K
Sorry ~16px extra on all sides
20:00
irieger
That the field of view of the lenses is totaly different then
20:01
irieger
Sorry, have to go afk, will look back later. (Note to myself: do a proper afk state like bertl/se6astian ...)
20:01
danieel
you can /nick
20:02
John_K
Hrm, true
20:03
John_K
Could be some interesting things you could do with the RAW though
20:03
John_K
Might be fun to play with at some point
20:09
Bertl
that's the beauty of the Axiom ... you can easily try out new ideas
20:09
niemand
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tezburma
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se6astian|away
changed nick to: se6astian
21:14
se6astian
time for bed
21:14
se6astian
gnight
21:14
se6astian
changed nick to: se6astian|away