Current Server Time: 09:45 (Central Europe)

#apertus IRC Channel Logs

2013/07/02

Timezone: UTC


22:15
se6astian
left the channel
03:55
jucar
joined the channel
03:57
jucar1
left the channel
06:52
dmj_nova
will be unable to work on the zedboard for the next couple days, since I won't have access my workstation.
06:52
dmj_nova
Visiting family for the 4th
10:12
Bertl
good morning everyone!
10:13
Bertl
dmj_nova: any progress so far?
10:14
dmj_nova
not so much, been having to give a little attention to my other projects
10:15
Bertl
I see, any findings or other stuff we should know about? any things we should consider/add to the wiki/improve on the examples?
10:15
Bertl
(just to avoid that information gets lost/is forgotten)
10:16
dmj_nova
well, probably the stuff I was confused by setting things up the other day
10:17
dmj_nova
I'm thinking we may want to just setup something like a build system script to automate things and simplify setup for new users
10:17
dmj_nova
but it might not be quite the time for it yet
10:18
Bertl
some kind of boot CD or so? or a virtual environment?
10:19
Bertl
maybe you could write down a few notes here what caused the most delays and frustration on your side (so far)?
10:19
dmj_nova
sure, I'll need to look over my logs to figure out what it was
10:20
dmj_nova
incidentally, A guy I know just launched a crowdfunding campaign to make a movie about hackers that actually knows what it's talking about.
10:21
Bertl
from my PoV, the most frustrating part was/is the scarce and extremely distribute documentation
10:21
Bertl
*distributed
10:21
dmj_nova
yes, it's not really in one nice place
10:21
Bertl
probably scattered is a better term
10:21
dmj_nova
actually their site seems purposely annoying to use
10:22
dmj_nova
like they didn't think about the developer trying to use their product
10:22
dmj_nova
1) uart vs prog and when to use each
10:23
dmj_nova
it's a minor thing, but did trip me up
10:23
dmj_nova
it messed me up on djtgcfg enum
10:24
dmj_nova
2) Couldn't find ISE plugins directory at first, should probably specify exactly where that is
10:27
Bertl
yeah, I can understand that
10:27
dmj_nova
and then it might be good to have a virtual image for tftp purposes already setup
10:27
dmj_nova
though network configuration might end up being an issue
10:28
Bertl
we might have the advantage that most routers do not speak bootp, and those who do, could be configured to ignore the requests
10:28
dmj_nova
hmm
10:29
Bertl
you didn't get an IP from your router via bootp, no?
10:29
dmj_nova
Bertl: hmm...I actually didn't
10:29
dmj_nova
was wondering why I didn't see it in the list
10:31
dmj_nova
BTW, I'm visiting family for the 4th and won't be able to drag my workstation on the train (which leaves in about 12 hours), so I won't be able to work with the zedboard 'til the 5th or 6th.
10:32
Bertl
that's why I was asking
10:40
Bertl
feel free to rant about the missing support and information from others here on the channel as well, that's all something we can improve on :)
10:42
Bertl
btw, I managed to get the amba bus working! \o/
10:42
dmj_nova
\o/
10:48
Bertl
I'll upload it shortly, still not cleaned up, but maybe you want to take a look
10:56
Bertl
http://vserver.13thfloor.at/Stuff/AXIOM/reg_file_axi/
14:40
S3bastian
joined the channel
14:40
S3bastian
hello!
14:42
Bertl
hey
14:42
S3bastian
I just forwarded you a very interesting email
14:42
S3bastian
I reached out to trenz electronik in Germany
14:43
S3bastian
and they seem to be rather interested and mentioned that FMC LPC and HPC seems to be compatible from the mechanical POV
14:44
Bertl
indeed very interesting
14:44
Bertl
yes, I figured that they are compatible
14:44
Bertl
there would be no point in having lpc and hpc if that wasn't the case
14:44
S3bastian
I thought they were just 2 different kind of connectors
15:13
S3bastian
left the channel
16:47
jucar
left the channel
16:47
se6astian
joined the channel
16:48
jucar
joined the channel
17:38
se6astian
good news, samtec wants to send us the FMC connectors as free samples
17:38
se6astian
apparently they dont want to process any orders below a couple of hundred pieces ;)
17:38
se6astian
very kind of them
17:39
Bertl
good news indeed!
17:42
se6astian
will ship tomorrow
17:43
se6astian
with UPS express
17:43
se6astian
could arrive even this week
17:43
se6astian
or at the beginning of the next
17:43
se6astian
in the meantime andon has not even replied to my price inquiry ;)
17:44
Bertl
hehe
17:45
Bertl
\o/ I have hdim picture!!!
17:45
Bertl
*HDMI even
18:11
jucar1
joined the channel
18:12
jucar
left the channel
18:23
se6astian
hurray!
18:23
se6astian
please post a photo!
18:23
se6astian
to mark this great achievement!
18:31
Bertl
http://vserver.13thfloor.at/Stuff/AXIOM/hdmi.jpg
18:31
Bertl
there you go
18:33
Bertl
the fact that there is only vertical coloring is a bug though
18:35
se6astian
thats OK, output test image is still an image :)
18:35
se6astian
will email to dev mailing list now
18:36
se6astian
and this images is generated in PL entirely?
18:36
Bertl
yes, let me upload the code
18:38
Bertl
the design is actually the one we discussed on the ML
18:39
Bertl
http://vserver.13thfloor.at/Stuff/AXIOM/hdmi_v1/
18:40
Bertl
i.e. there is a generator (data_gen.vhd) which creates the image (in PL)
18:40
Bertl
there is a register file (reg_file) which allows the image parameters to be adjusted
18:40
Bertl
and there is the i2c interface PS via PL to the adv7511
18:40
Bertl
all the control values are set from linux
18:40
Bertl
(i2c, reg_file via memory mapping)
18:41
Bertl
but once everything is setup, you can reboot linux without affecting the image
18:43
se6astian
very nice
18:44
se6astian
email sent
18:44
se6astian
big milestone
18:45
Bertl
I've added the scripts as well
18:45
se6astian
is it a single image in memory so far or could a next step be to "animate" it, like change colors slowly?
18:45
Bertl
it is dynamically generated
18:45
Bertl
i.e. on the fly by the generator
18:45
se6astian
maybe its time I give you commit access to GitHub?
18:46
se6astian
I see, even better!
18:46
Bertl
so moving pictures is only a matter of adding a frame counter :)
18:46
Bertl
but I first have to fix the bug, I obviously misinterpreted the fromat
18:46
Bertl
*format
18:48
se6astian
please register on GitHub, then I can give you commit access to the apertus project
18:52
Bertl
hmm, there was a reason why I didn't register there ... have to check that
19:09
dmj_nova
Bertl: excellent!
19:23
Bertl
tx
20:56
Bertl
there we go, moving pictures in full color :)
20:57
Bertl
(will upload in a moment)
21:06
dmj_nova
sweet
21:06
se6astian
hurray!
21:21
Bertl
haha, nice detail, the bus order can be reversed, so maybe more modes are available after all
21:22
Bertl
for example, table 20 style 1 would be impossible without that
21:23
Bertl
but I guess that's the only one we can add
21:26
Bertl
http://vserver.13thfloor.at/Stuff/AXIOM/hdmi_v2/
21:31
Bertl
hmm, as I thought, we can bypass the CSC
21:32
Bertl
e.g. 'i2c_bit 0x39 0x18 7 0' makes YCbCr -> GBR i.e. YCbYCr -> GBGR
21:33
Bertl
so putting aside that we still have 4:2:2 not 4:4:4, we can do basic RGB
21:33
Bertl
(without any colorspace conversion)
21:37
se6astian
double hurray!
21:40
dmj_nova
do you think 4:4:4 is possible?
21:41
Bertl
no, not directly, I haven't found a mode which would fit the zedboards I/O layout
21:43
Bertl
all the 4:4:4 modes use signals outside D8-D23
21:43
Bertl
with the bus order trick we could basically use modes for D12-D27 but that doesn't help with 4:4:4
21:47
Bertl
AFAICT, all 4:4:4 modes either use D0-D8 or D24-D35, which is out of reach on the zedboard
21:48
Bertl
I have no idea why the designers decided to skip the first 8 data inputs (IMHO that must have been an accident)
21:56
se6astian
IMHO 4:4:4 is not THAT important, 4:2:2 is fine for the prototype
21:56
Bertl
yes, especially if we make the overlay monochrome
21:57
Bertl
but of course, 4:4:4 would have been a lot easier/nicer to work with
21:58
dmj_nova
For the prototype it would have been "nice to have" but I doubt any of the prototypes will be used for heavy vfx work
21:59
dmj_nova
which is as far as I can tell, the main reason 4:4:4 matters