Current Server Time: 20:49 (Central Europe)

#apertus IRC Channel Logs

2021/11/01

Timezone: UTC


05:54
illwieckz
left the channel
05:54
anuejn
left the channel
05:54
felix_
left the channel
05:54
BAndiT1983
left the channel
05:54
vup
left the channel
05:54
felix_
joined the channel
05:55
vup
joined the channel
05:55
anuejn
joined the channel
05:55
BAndiT1983
joined the channel
05:55
illwieckz
joined the channel
06:02
dos1
left the channel
06:03
dos
joined the channel
06:14
tpw_rules
left the channel
06:17
tpw_rules
joined the channel
07:39
Bertl
off to bed now ... have a good one everyone!
07:40
Bertl
changed nick to: Bertl_zZ
09:37
aombk2
left the channel
09:39
aombk
joined the channel
09:40
aombk2
joined the channel
09:44
aombk
left the channel
15:43
Bertl_zZ
changed nick to: Bertl
15:43
Bertl
morning folks!
15:57
yasmin
joined the channel
17:00
se6astian
MEETING TIME, who is here?
17:00
Bertl
is here ...
17:01
yasmin
Yasmin is here
17:01
se6astian
great, yasmin how are things going on your end?
17:03
yasmin
Great actually :D
17:03
yasmin
finally the installation problem was solved
17:03
yasmin
and i will deliver my first task to betrl today
17:03
se6astian
very good, wat was your first task?
17:04
yasmin
i will do the fpga flow for a code and return the results and the schematics for Betrl
17:05
yasmin
the code it the top module of the peripheral part if remember right
17:05
Bertl
basically updating the gateware to vivado 2021.x
17:05
yasmin
i did it before in the 2018 version and i will repeat it for the 2021 version this time
17:05
yasmin
yes :D
17:05
yasmin
2021.1
17:06
se6astian
ah, I see
17:07
se6astian
right
17:07
se6astian
anything else you want to share yasmin?
17:07
yasmin
no
17:09
se6astian
right, many thanks !
17:09
se6astian
quick updates from my side: BAndiT1983 and me worked on a raw12 viewer
17:10
se6astian
a small gui that shows image content in monochrome or color preview quickly
17:10
se6astian
today I added switching between next/previous images in same dir
17:10
se6astian
and BAndiT1983 brought loading and displaying logic to below 1 second on my rather old machine
17:10
se6astian
so quite useable already
17:11
se6astian
different zoom/decimation levels are still on the todo list
17:11
se6astian
gui elements are there already
17:11
se6astian
if you want to test it
17:11
se6astian
https://github.com/apertus-open-source-cinema/misc-tools-utilities/blob/hdmi-raw-2021/raw-via-hdmi/scripts/viewer.py
17:11
se6astian
just provide the path to a raw12 image as parameter
17:12
se6astian
here is the matching lab task: https://lab.apertus.org/T1276
17:12
se6astian
holiday today in austria so I was not in our office to complete the hdmi plugin module assembly
17:12
se6astian
but planned soon
17:12
se6astian
thats it from me, Bertl do you also have news for us?
17:13
Bertl
not much, but a few small pieces of information ...
17:13
vup
is here
17:13
Bertl
vup: got something to report?
17:13
vup
nope
17:14
Bertl
okay, so I discovered the Aluminum (Aluminium) PCB feature pooling services offer now (some of them for very cheap)
17:15
Bertl
and thought to me, that might come handy for heat sink prototyping and similar, e.g. for our below sensor heat transport
17:15
se6astian
oshpark?
17:15
Bertl
JLCPCB and MultiPCB
17:15
se6astian
ah
17:16
Bertl
I ordered some boards just for testing and it seems they are quite nice, so we can use that in the future for prototyping
17:17
Bertl
(will upload some images later, but nothing unexpected there)
17:17
cscar
joined the channel
17:17
cscar
Sorry I'm late. But hi!
17:17
Bertl
on the Magewell USB front, after se6astian got feedback about using sudo/root for the SDK examples
17:18
se6astian
yes, was about to ask about the sdk based prototype you were creating
17:18
se6astian
hi oscar!
17:18
Bertl
I did some more investigations and it turns out that we should be able to address/avoid that by using a proper udev rule for the device
17:19
Bertl
will prepare and test something in the next few days, so we should have a hash check tool which works with both, PCIe and USB devices
17:19
Bertl
that's it from my side for this week
17:20
se6astian
great, many thanks
17:20
se6astian
any news to report oscar?
17:21
cscar
Not much. The yearly tax return papers arrived today. All good.
17:22
cscar
Meaning no taxes ;)
17:23
se6astian
good :)
17:24
se6astian
right, anyone else who wants to share/report anything at the meeting?
17:27
se6astian
right then, many thanks everyone who participated! MEETING CONCLUDED
17:27
yasmin
Thank you ^^
17:27
cscar
Thanks!
17:27
vup
yasmin: are you using the ml enabled version of vivado?
17:28
cscar
left the channel
17:28
yasmin
yes ML standard
17:28
vup
interesting, did you have a chance to compare the speed to previous versions?
17:28
vup
its supposed to be a lot faster
17:29
vup
(and also the QoR is supposed to be better)
17:29
yasmin
unfortunately no but this is interesting :D
17:29
vup
hmm unfortunate
17:30
vup
seems like I need to free up some space on my ssd and try myself sometime
17:31
yasmin
:((
17:31
vup
how much space is it taking for you?
17:32
yasmin
rounf 65 or 66 GB
17:32
yasmin
round*
17:32
vup
holy shit
17:32
vup
2019.2 is only taking 19Gb and thats with the SDK
17:32
yasmin
yes its HUGE :D its installation file was 52 GB, 2018 version was less than 18 GB :D
17:33
vup
yep
17:33
vup
seems like they have gained some serious weight
17:33
Bertl
performance seems to be better, place and route didn't change too much, although it seems to benefit from repeated implementations
17:33
Bertl
there is a lot of additional stuff in the package
17:33
vup
you mean they are doing incremental pnr somehow?
17:34
Bertl
vivado has reused the previous placement results for re-runs for some time now
17:34
vup
since when?
17:34
Bertl
so if you do not scratch the data from the previous build, results will be reused
17:35
Bertl
since 2017.x or so
17:35
vup
interesting
17:35
vup
do you have any feeling for how well this works if you flatten the hierarchy?
17:35
vup
or is this more hierarchy / single module pnr based?
17:36
Bertl
it seems to work fine with a flattened hierarchy if you have 'rebuild' enabled
17:36
vup
hmm makes sense
17:36
Bertl
which helps to get meaningfull debug/schematic/simulation signals anyway
17:37
vup
well I am doing all debugging / simulation with nmigen, so I don't really care about that
17:38
vup
but this means this could reasonable work reasonable well with nmigen, as that now actually generates modules (as opposed to migen which always only generated a single huge module)
17:39
vup
s/reasonable//
17:40
Bertl
might definitely be worth a try
17:53
yasmin
left the channel
18:39
Bertl
off for now ... bbl
18:39
Bertl
changed nick to: Bertl_oO