| 01:41 | Bertl_oO | off to bed now ... have a good one everyone!
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| 11:11 | Bertl | morning folks!
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| 12:30 | Bertl | off for now ... bbl
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| 20:53 | anu3jn | Excited to start the hackathon tomorrow :):)
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| 21:23 | Bertl_oO | what's the first topic to tackle?
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| 21:45 | anu3jn | i guess planing what we will do when?
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| 21:45 | anu3jn | but maybe also some backlog on the firmware side re the changes you requested
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| 21:45 | anu3jn | i think you have a word to say here too
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| 21:52 | Bertl_oO | appreciated! but I do not want to hinder your excitement and enthusiasm ... :)
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| 21:53 | Bertl_oO | I'm sure se6ast1an will have tons of stuff which 'needs to be done' :)
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| 21:56 | anu3jn | okay 😂
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| 21:57 | anu3jn | maybe we can also use the chance to discuss the way forward for the nmigen-gateware / the vhdl gateware
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| 21:58 | Bertl_oO | certainly
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| 21:58 | anu3jn | and get you hooked on nmigen
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| 21:59 | anu3jn | do you know if the heavy use of dsp elements in your vhdl code is really nescessary to meet timing or just an optimization you did to save resources
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| 21:59 | anu3jn | (e.g. in the hdmi core for comparing values)
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| 22:00 | Bertl_oO | very likely it isn't necessary, but it made things a lot easier
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| 22:00 | Bertl_oO | 12bit counter should be doable at reasonably high rates with 'normal' logic
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| 22:01 | Bertl_oO | comparators might be trickier, i.e. need to be pipelined (look ahead, early check, etc)
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| 22:01 | Bertl_oO | the DSPs were a perfect choice there as they have everything needed
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| 22:02 | anu3jn | yup i see that but it makes the code somewhat hard to understand
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| 22:02 | anu3jn | maybe we have to build something in nmigen that lets us have both
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| 22:19 | Bertl_oO | well, in general, utilizing the hardened IP in the Zynq reduces power consumption and frees up generic cells for other stuff, on the other hand having a dual RTL IP which can either utilize the DSP or implement the same with generic cells gives even more flexibility
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| 22:53 | vup | For simple stuff one could also try to rely on dsp inference
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| 22:55 | anu3jn | but does vivado infer dsps for stuff like comparision reliably?
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| 22:55 | anu3jn | i think our nmigen hdmi core didnt use any
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