Current Server Time: 03:22 (Central Europe)

#apertus IRC Channel Logs

2020/08/01

Timezone: UTC


00:41
Bertl_oO
off to bed now ... have a good one everyone!
00:41
Bertl_oO
changed nick to: Bertl_zZ
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BAndiT1983|away
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danieel
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10:11
Bertl_zZ
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10:11
Bertl
morning folks!
11:30
Bertl
off for now ... bbl
11:30
Bertl
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BAndiT1983
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jarhab[m]
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anuejn[m]
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test[m]
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anuejn[m]
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BAndiT1983|away
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19:53
anu3jn
Excited to start the hackathon tomorrow :):)
20:23
Bertl_oO
what's the first topic to tackle?
20:45
anu3jn
i guess planing what we will do when?
20:45
anu3jn
but maybe also some backlog on the firmware side re the changes you requested
20:45
anu3jn
i think you have a word to say here too
20:52
Bertl_oO
appreciated! but I do not want to hinder your excitement and enthusiasm ... :)
20:53
Bertl_oO
I'm sure se6ast1an will have tons of stuff which 'needs to be done' :)
20:56
anu3jn
okay ð
20:57
anu3jn
maybe we can also use the chance to discuss the way forward for the nmigen-gateware / the vhdl gateware
20:58
Bertl_oO
certainly
20:58
anu3jn
and get you hooked on nmigen
20:59
anu3jn
do you know if the heavy use of dsp elements in your vhdl code is really nescessary to meet timing or just an optimization you did to save resources
20:59
anu3jn
(e.g. in the hdmi core for comparing values)
21:00
Bertl_oO
very likely it isn't necessary, but it made things a lot easier
21:00
Bertl_oO
12bit counter should be doable at reasonably high rates with 'normal' logic
21:01
Bertl_oO
comparators might be trickier, i.e. need to be pipelined (look ahead, early check, etc)
21:01
Bertl_oO
the DSPs were a perfect choice there as they have everything needed
21:02
anu3jn
yup i see that but it makes the code somewhat hard to understand
21:02
anu3jn
maybe we have to build something in nmigen that lets us have both
21:19
Bertl_oO
well, in general, utilizing the hardened IP in the Zynq reduces power consumption and frees up generic cells for other stuff, on the other hand having a dual RTL IP which can either utilize the DSP or implement the same with generic cells gives even more flexibility
21:22
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21:53
vup
For simple stuff one could also try to rely on dsp inference
21:55
anu3jn
but does vivado infer dsps for stuff like comparision reliably?
21:55
anu3jn
i think our nmigen hdmi core didnt use any
22:06
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BAndiT1983
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