Current Server Time: 19:50 (Central Europe)

#apertus IRC Channel Logs

2019/05/01

Timezone: UTC


01:55
Bertl_oO
off to bed now ... have a good one everyone!
01:55
Bertl_oO
changed nick to: Bertl_zZ
02:43
futarisIRCcloud
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05:11
Ashu
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05:24
Ashu
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08:10
niemand
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08:10
niemand
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08:10
niemand
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08:42
se6astian|away
changed nick to: se6astian
08:44
se6astian
good day
09:06
BAndiT1983|away
changed nick to: BAndiT1983
09:27
se6astian
time to screw around again!
09:27
se6astian
https://media.rs-online.com/t_large/F3044801-01.jpg
09:52
Kjetil
screw you guys! or something
09:52
Kjetil
;)
09:55
BAndiT1983
https://www.youtube.com/watch?v=RXS1sJm7QEA
11:30
Y_G
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11:59
Y_G
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12:02
Spirit532
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Spirit532
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12:03
futarisIRCcloud
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12:09
Y_G
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12:47
Bertl_zZ
changed nick to: Bertl
12:47
Bertl
morning folks!
13:04
Nira
changed nick to: Nira|away
13:07
Nira|away
changed nick to: Nira
13:54
Y_G
Hi BAndiT1983 , what is the "Execute" function in the MessageHandler.cpp intended to do ?
13:55
Y_G
It says that " Implement packet to trigger applying/retrieving of settings sent to daemon"
13:56
Y_G
Isn't this already implemented in the "ProcessReceivedData" in the Daemon.cpp ?
14:12
BAndiT1983
hi Y_G
14:12
BAndiT1983
it was added for possible batch processing of messages
14:13
BAndiT1983
to be able to trigger multiple changes at once
14:35
aSobhy
Bertl, finally I'm running xilinx Webpack :)
14:35
aSobhy
so Is there a makefile for the ZYNQ as the MachXO2 you sent me before ?
14:35
Bertl
yay!
14:36
Bertl
on the Vivado side, we use TCL to automate the build
14:36
Bertl
if you check the top.vhd file, there should be a line to start the process
14:38
aSobhy
going through it now
14:38
Bertl
(bottom of the comments section)
14:39
apurvanandan[m]
aSobhy So where was the problem in downloading
14:41
aSobhy
that line
14:41
aSobhy
(cd build.vivado && vivado -mode tcl -source ../vivado.tcl)
14:41
aSobhy
right ?
14:41
Bertl
yup
14:42
aSobhy
apurvanandan[m]: Its a long story I am at category D from Egypt that they don't support,
14:42
aSobhy
and those guys are really smart for detecting where you are and a lot of checks
14:44
aSobhy
but I made a tricky solution to download it officially ^_^
14:46
aSobhy
You should downloaded it, isn't you? I think India also has those restriction !
14:47
Y_G
oK,Thanks BAndiT1983 I will look into how to approach it
14:49
aSobhy
Thanks Bertl I'm on vivado.tcl now
14:50
Bertl
you're welcome!
14:55
aSobhy
Is their any tool I'll use it so I can install it early
14:55
Bertl
hmm?
14:56
aSobhy
as I always face a lot of troubles as I see :/
14:57
Bertl
not sure what you mean with 'install early'
14:57
Bertl
(i.e. please rephrase :)
14:58
aSobhy
to have a time to install a tool if it has trouble or restriction
14:58
aSobhy
and install it before I start coding
14:58
Bertl
ah, got it ...
14:59
Bertl
well, there are some tools which might come handy like Ikarus Verilog and GTKWave
15:00
Bertl
we also sometimes use the Saleae logic analyzer software
15:00
Bertl
except for that it's Vivado and Diamond
15:01
Bertl
ah, and you might benefit from an Eagle 7.7.0 install for schematic details
15:01
Y_G
left the channel
15:03
aSobhy
OK, I,ll search for them and back again :)
15:03
Bertl
great!
15:03
BAndiT1983
changed nick to: BAndiT1983|away
15:04
BAndiT1983|away
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15:07
BAndiT1983
changed nick to: BAndiT1983|away
15:54
lexano
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lexano
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17:43
BAndiT1983|away
changed nick to: BAndiT1983
17:46
illwieckz
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illwieckz
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18:12
BAndiT1983
changed nick to: BAndiT1983|away
18:27
se6astian
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19:01
BAndiT1983|away
changed nick to: BAndiT1983
19:15
BAndiT1983
changed nick to: BAndiT1983|away
19:44
BAndiT1983|away
changed nick to: BAndiT1983
20:48
se6astian|away
changed nick to: se6astian
21:12
Nira
changed nick to: Nira|away
21:13
Nira|away
changed nick to: Nira
21:38
Bertl
off for now ... bbl
21:39
Bertl
changed nick to: Bertl_oO
21:54
BAndiT1983
changed nick to: BAndiT1983|away
22:02
se6astian
off for today
22:02
se6astian
good night
22:02
se6astian
changed nick to: se6astian|away
22:11
apurvanandan[m]
Hi Bertl, I got a very basic doubt. I asking it, please don't mind.
22:13
apurvanandan[m]
We have 160 MHz clock with 48 bit on each clock read from RAM on Zynq. On other side we have 32 bit wide 100MHz fifo input in ft601.
22:15
apurvanandan[m]
And 160*48 > 100*32, so this means we need to slow down reading from RAM?
22:23
niemand
left the channel
22:32
Nira
changed nick to: Nira|away
23:04
Bertl_oO
apurvanandan[m]: yes, we do not read all the time from memory at the full rate .. data goes through a FIFO which throttles it as needed
23:08
Bertl_oO
but we need to think about (ideally lossless) compression for higher framerates on USB output